Welcome to Edge AI Implementation Memo
This blog is a memo for recording the implementation process of embedded AI technology. We share practical content on embedded system development including AI implementation, video application.
Posts
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SAM2 Video Segmentation inference on Jetson Orin Nano
はじめに
Jetson Orin Nano上でSAM2 動画推論を動かしたときのメモ
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MIPI Tx/Rx System Design on Zynq
Introduction
This document is a memo on using Xilinx-provided IP, namely the MIPI CSI-2 Rx Subsystem and MIPI DSI Tx Subsystem.
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FPGA + Zynq for Graphic Display Circuit
Introduction
This post documents the implementation steps described from Chapter 9 onward in the referenced book
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ResNet Quantization and Inference Execution with DPU IP and Vitis AI
Introduction
This is a memo outlining the basic steps to run a DNN model using Vitis AI and Zynq MPSoC, as I had forgotten many details after a long break. It’s easy to forget FPGA-related procedures each time.
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Creating a Pattern Display Circuit with Vitis HLS High-Level Synthesis
Introduction
This post continues from the previous one, documenting the practical application of “High-Level Synthesis Applications” from Chapter 11-1 onward in “FPGA Programming Complete Guide, 2nd Edition”.
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